chisel

to generate verilog code…

workflow is :

1
2
3
sudo pacman -S sbt jdk-openjdk verilator

git clone https://github.com/chipsalliance/chisel-template.git MyChiselProject

then we get a directory MyChiselProject.

the code write in : MyChiselProject/src/main/scala

you can create a folder here, like example,

then write code in the example folder.

after done, back to the root path of the MyChiselProject , run :

1
2
sbt "runMain example.Elaborate"
(if your chisel file is named Elaborate.scala)

you can update your sbt after modify the build.sbt and project/plugins.sbt, then :

1
sbt update

to install package.

or:

install scala-cli

1
2
3
4
5
curl -fL https://github.com/Virtuslab/scala-cli/releases/latest/download/scala-cli-x86_64-pc-linux.gz | gzip -d > scala-cli
chmod +x scala-cli
sudo mv scala-cli /usr/local/bin/scala-cli

scala-cli version

then test:

1
2
curl -O -L https://github.com/chipsalliance/chisel/releases/latest/download/chisel-example.scala
scala-cli chisel-example.scala

command lines homepage

click here to come back to command line homepage.