create IP core is an important step during PYNQ’s dev, but vivado does not have the board model by default(at least in the version of vivado 2024.2)….

as PYNQ-Z2 for example, one way to do that is to choose the chip instead of board, use the xc7z020clg400-1.(-1 means the highest speed but most expensive, it can be used under the highest clock frequency, -2 means standard speed, -3 means the lowest speed.)

another way to create PYNQ-Z2 project is to download the official package, from https://github.com/Xilinx/Pynq, and open vivado, use its console, come to boards/Pynq-Z2/base, run: source ./build-ip.tcl and base.tcl, then you will get a base project of PYNQ-Z2.

if your vivado can not run base.tcl, you should use the right version of vivado open the project, and use Tools -> Report -> Report IP Status... to upgrade all IP core, then run write_bd_tcl to create a new .tcl that can be used by your vivado.(or you can modify base.tcl, change the scripts_vivado_verion to your vivado, but may cause errors.)